Abstract
A multiprocessor scheduler has been developed for scheduling signal processing and other algorithms on programmable digital signal processors that can be connected in a common-bus or hypercube topology. The scheduler requires an acyclic precedence graph of the algorithm and the cost of all interprocessor communications. The software tool permits the user to select from among three different scheduling algorithms. The first is a heuristic method, the second uses dynamic programming, and the third uses integer linear programming. Schedules for six practical signal processing algorithms are obtained, and throughput rates are compared to those obtained with uniprocessor implementation Author(s) Mirchandani, G. Dept. of Comput. Sci. & Electr. Eng., Vermont Univ., Burlington, VT, USA Twombly, P.

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