On effective data supply for multi-issue processors

This publication has 14 references indexed in Scilit:

• On the inclusion properties for multi-level cache hierarchies
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• Reducing conflicts in direct-mapped caches with a temporality-based design
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• PA7200: a PA-RISC processor with integrated high performance MP bus interface
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• A CMOS RISC CPU with on-chip parallel cache
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• A design framework for hybrid-access caches
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Retrospective: alternative implementations of two-level adaptive training branch prediction
  Published by Association for Computing Machinery (ACM) ,1998
• A modified approach to data cache management
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1995
• Optimization of instruction fetch mechanisms for high issue rates
  Published by Association for Computing Machinery (ACM) ,1995
• Increasing the instruction fetch rate via multiple branch prediction and a branch address cache
  Published by Association for Computing Machinery (ACM) ,1993
• Cache replacement with dynamic exclusion
  Published by Association for Computing Machinery (ACM) ,1992