1 GHz CMOS 12:1 time division MUX/DEMUX pair
- 9 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 3.5/1-3.5/4
- https://doi.org/10.1109/cicc.1991.164078
Abstract
A 1-GHz 12:1 MUX/DEMUX (multiplexer/demultiplexer) pair has been designed and fabricated in 0.9- mu m CMOS technology. They work with input clock amplitudes as low as 1.0 V. The skew between the clock and high-speed data to DEMUX can vary as much as 700 ps. The MUX drives up to 50 mA of current into the equivalent of a 25- Omega load with rise/fall times of approximately 200 ps. The pair was tested in package form, yielding a 0 bit error rate with pseudorandom data up to 900 MHz. Full custom cells were used in the high-speed section, and standard cells were used for the low-speed section.Keywords
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