Non-classical CMOS device design
- 1 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 49 (1078621X) , 155-157
- https://doi.org/10.1109/soi.2003.1242935
Abstract
In this paper, we describe the designing process of nonclassical FD/SOI and SDG CMOS devices and to allow high-performance (HP) and low-power (LP) CMOS to be integrated on the same chip.Keywords
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