Dynamic Characteristics of Inverter Circuits Using Single Electron Transistors

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Abstract
We have investigated the basic characteristics of capacitively and resistively coupled single-electron tunneling (SET) inverters as a digital logic circuit. Static and dynamic characteristics have been calculated based on the semiclassical model using the Monte Carlo method. Although a voltage gain larger than unity is found even in a cascade connection of two stages of the SET inverters, they reveal some disadvantages in digital logic application, such as small voltage gain, poor input-output separation, small logic level difference, instability of operating point and oscillating output voltages. The switching delay time is estimated to be on the order of 100R C, where R and C is resistance and capacitance of a tunnel junction, respectively. The stability of logic voltage levels has also been verified in cross-coupled latch circuits.