Abstract
The asynchronous transfer mode (ATM) teehrdque has been widely accepted as a flexible and effeetive scheme to transport various traftic over the future broadband network. To futly utiliie network resources white still providing satisfactory qtilty of service (QOS) to all network usem, prioritizing the user's traftic according to their service requirements beeomea necessary. During calt setup or service provMoning, each service ean be assigned a service class determined by a delay priority and a loss priority. A queue mamtger in ATM network nodes will schedule ATM cells' departing and discarding sequenee based on their delay and loss priorities. Most queue management schemes prapoaed so far only consider either one of these two priority typea. In this paper, the queue manager handles mukiple delay and loss priorities simultaneously. Moreover, a cell dmrding strategy, called push-out, that allows the buffer to be completely shared by all service classes, haa been adopted in the queue manager. We propose a practicat architecture to implement the queue manager by using avaitable VLSI sequencer chips. 1. INTRODUC'HON

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