A 3GHz 12-channel time-division multiplexer-demultiplexer chip set
- 1 January 1986
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 7 references indexed in Scilit:
- Monolithic 1.6 Gbit/s 8:1 Multiplexer and 1:8 Demultiplexer Subsystems using CDFLPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1985
- A GaAs DCFL Chip Set for Multiplex and Demultiplex Applications at Gigabit/Sec Data RatesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1984
- A time division multiplexer IC for bit rates up to about 2 Gbits/sIEEE Journal of Solid-State Circuits, 1984
- A high speed GaAs 8-bit multiplexer using capacitor-coupled logicIEEE Journal of Solid-State Circuits, 1983
- A GaAs MSI word generator operating at 5 Gbits/s data rateIEEE Transactions on Electron Devices, 1982
- MSI High-Speed Low-Power GaAs Integrated Circuits Using Schottky Diode FET LogicIEEE Transactions on Microwave Theory and Techniques, 1980
- A versatile ECL multiplexer IC for the Gbit/s rangeIEEE Journal of Solid-State Circuits, 1979