A streaming processing unit for a CELL processor
- 30 August 2005
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 01936530,p. 134-135
- https://doi.org/10.1109/isscc.2005.1493905
Abstract
The design of a 4-way SIMD streaming data processor emphasizes achievable performance in area and power. Software controls data movement and instruction flow, and improves data bandwidth and pipeline utilization. The micro-architecture minimizes instruction latency and provides fine-grain clock control to reduce power.Keywords
This publication has 2 references indexed in Scilit:
- A 4.8GHz fully pipelined embedded SRAM in the streaming processor of a CELL processorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- The design and implementation of a first-generation CELL processorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005