Anomalous Behavior of Synchronizer and Arbiter Circuits

1 April 1973

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers

Vol. C-22 (4) , 421-422
https://doi.org/10.1109/t-c.1973.223730

Abstract

Observations are shown of oscillatory and metastable behavior of flip-flops in response to logically undefined input conditions such as those that occur in synchronizers and arbiters. Significant systems failures have resulted from this fundamentally inescapable problem that is generally not appreciated by system designers and users.

Keywords

SYNCHRONIZER
ARBITER
LOGICALLY UNDEFINED
CIRCUITS OBSERVATIONS
SYSTEMS FAILURES
SYSTEM DESIGNERS
METASTABLE BEHAVIOR
SIGNIFICANT SYSTEMS
FLIP FLOPS

This publication has 1 reference indexed in Scilit:

Time Loss Through Gating of Asynchronous Logic Signal Pulses
IEEE Transactions on Electronic Computers, 1966