Generic test chip formats for ASIC-oriented semiconductor process development

This publication has 3 references indexed in Scilit:

• Statistical Significance Of Defect density Estimates
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2005
• Standardization of test structure design
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• A standardized method for CMOS unit process development
  IEEE Transactions on Semiconductor Manufacturing, 1992