Experiences with concurrent fault simulation of diagnostic programs
- 1 June 1990
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 9 (6) , 621-628
- https://doi.org/10.1109/43.55192
Abstract
A methodology is presented for fault simulation of a system level diagnostic program involving large models (50000 to 200000 gates) and long test sequences. The accuracy of memory models and the interplay of fault insertion and fault selection with diagnostic program development are topics covered. It also details observation and statistical methods and tools used to investigate the operation of `faulty machines' (the fault effects created by an individual fault source). Observation of individual faulty machines is critical to provide information about looping and erratic programs, violations to subprogram sequencing, etc. This methodology is a successful attempt to make fault simulation of system diagnostics feasibleKeywords
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