A system-level circuit model for multi- and single-chip CPUs

Publisher Website

1 January 1987

proceedings article
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 308-309
https://doi.org/10.1109/isscc.1987.1157231

Abstract

No abstract available

This publication has 2 references indexed in Scilit:

Placement and average interconnection lengths of computer logic
IEEE Transactions on Circuits and Systems, 1979
On a Pin Versus Block Relationship For Partitions of Logic Graphs
IEEE Transactions on Computers, 1971