Built-in test for complex digital integrated circuits
- 1 June 1980
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 15 (3) , 315-319
- https://doi.org/10.1109/jssc.1980.1051391
Abstract
No abstract availableThis publication has 5 references indexed in Scilit:
- Probabilistic Analysis of Random Test Generation Method for Irredundant Combinational Logic NetworksIEEE Transactions on Computers, 1975
- An Advanced Fault Isolation System for Digital LogicIEEE Transactions on Computers, 1975
- Polynomially Complete Fault Detection ProblemsIEEE Transactions on Computers, 1975
- Enhancing Testability of Large-Scale Integrated Circuits via Test Points and Additional LogicIEEE Transactions on Computers, 1973
- Encoding and error-correction procedures for the Bose-Chaudhuri codesIEEE Transactions on Information Theory, 1960