Dual Threshold Voltages And Substrate Bias: Keys To High Performance, Low Power, 0.1 /spl mu/m Logic Designs

Publisher Website

1 January 1997

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 69-70
https://doi.org/10.1109/vlsit.1997.623699

Abstract

No abstract available

Keywords

This publication has 1 reference indexed in Scilit:

A 0.9-V, 150-MHz, 10-mW, 4 mm/sup 2/, 2-D discrete cosine transform core processor with variable threshold-voltage (VT) scheme
IEEE Journal of Solid-State Circuits, 1996