Flash EPROM disturb mechanisms
- 1 January 1994
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 35, 299-308
- https://doi.org/10.1109/relphy.1994.307820
Abstract
Analyses have been performed on floating-gate avalanche-injection MOS transistor (FAMOS) devices which have been subjected to write/erase cycling, resulting in hole injection into the tunnel dielectric. Theoretical and experimental analysis of these devices have shown that the bits which exhibit fast erase due to these trapped holes are highly modulated by the field across the tunnel dielectric. Two distinct disturb mechanisms, one of which is heavily impacted by write/erase cycling, have been evaluated with regards to their field and temperature dependencies and empirical models have been developed for both mechanisms.Keywords
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