Degradations due to hole trapping in flash memory cells
- 1 March 1989
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 10 (3) , 117-119
- https://doi.org/10.1109/55.31687
Abstract
Degradation in the hot-electron programmability of the flash memory cell is observed after erasing from the drain. Trapped holes in the oxide near the drain junction are found to be responsible for this degradation. Hole trapping in the oxide also causes another problem known as gate disturb, which is the undesired increase in the threshold voltage of an erased cell during programming of the other cells on the same word line. Threshold-voltage shifts due to gate disturb are used to monitor the amount of trapped holes in the oxide after cell erasure. It is determined that the trapped holes are mainly externally injected from the junction depletion region rather than directly generated in the oxide by the Fowler-Nordheim (F-N) tunneling process.Keywords
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