The effects of false paths in high-level synthesis

This publication has 8 references indexed in Scilit:

• Area and performance optimizations in path-based scheduling
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• High-Level VLSI Synthesis
  Published by Springer Nature ,1991
• Integrating Functional and Temporal Domains in Logic Design
  Published by Springer Nature ,1991
• Data-path synthesis using path analysis
  Published by Association for Computing Machinery (ACM) ,1991
• Path-based scheduling for synthesis
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1991
• Force-directed scheduling for the behavioral synthesis of ASICs
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1989
• REAL: a program for REgister ALlocation
  Published by Association for Computing Machinery (ACM) ,1987
• LSS: A system for production logic synthesis
  IBM Journal of Research and Development, 1984