RELIANT: a reliability analysis tool for VLSI interconnects

Abstract
RELIANT is a CAD (computer-aided design) tool which predicts the failure rate of integrated circuit conductors. Circuit layout, device models, and electromigration process data are inputs to RELIANT. The interconnect patterns in a Caltech Intermediate Format (CIF) file are fractured into a number of characteristic segment types. An equivalent circuit is extracted and SPICE is used to determine the transient currents in each segment. Using parametric models for electromigration damage, the failure rate of the system is computed. RELIANT provides designers with feedback on the reliability hazards of a design. Results show the application of the tool to a standard-cell CMOS component. For modeling large VLSI interconnect systems, the incorporation of a switch-level simulator is discussed.