Instruction selection for embedded DSPs with complex instructions
- 24 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 9 references indexed in Scilit:
- Automatic instruction code generation based on trellis diagramsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Time-constrained code compaction for DSPsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Optimal code generation for embedded memory non-homogeneous register architecturesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A BDD-based frontend for retargetable compilersPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Conflict Modelling and Instruction Scheduling in Code Generation for In-House DSP CoresProceedings of the 39th conference on Design automation - DAC '02, 1995
- Engineering a simple, efficient code-generator generatorACM Letters on Programming Languages and Systems, 1992
- Code generation using tree matching and dynamic programmingACM Transactions on Programming Languages and Systems, 1989
- Verification of hardware descriptions by retargetable code generationPublished by Association for Computing Machinery (ACM) ,1989
- Some Experiments in Local Microcode Compaction for Horizontal MachinesIEEE Transactions on Computers, 1981