Exploring Energy/Performance Tradeoffs in Shared Memory MPSoCs: Snoop-Based Cache Coherence vs. Software Solutions
- 1 January 2005
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 508-513
- https://doi.org/10.1109/date.2005.148
Abstract
Shared memory is a common interprocessor communication paradigm for single-chip multi-processor platforms. Snoop-based cache coherence is a very successful technique that provides a clean shared-memory programming abstraction in general-purpose chip multi-processors, but there is no consensus on its usage in resource-constrained multiprocessor systems on chips (MPSoCs) for embedded applications. This work aims at providing a comparative energy and performance analysis of cache coherence support schemes in MPSoCs. Thanks to the use of a complete multi-processor simulation platform, which relies on accurate technology-homogeneous power models, we were able to explore different cache-coherent shared-memory communication schemes for a number of cache configurations and workloads.Keywords
This publication has 13 references indexed in Scilit:
- Analyzing on-chip communication in a MPSoC environmentPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2004
- JETTY: filtering snoops for reduced energy consumption in SMP serversPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- TLB and snoop energy-reduction using virtual caches in low-power chip-multiprocessorsPublished by Association for Computing Machinery (ACM) ,2002
- POWER4 system microarchitectureIBM Journal of Research and Development, 2002
- The MAJC architecture: a synthesis of parallelism and scalabilityIEEE Micro, 2000
- Automatic characterization and modeling of power consumption in static RAMsPublished by Association for Computing Machinery (ACM) ,1998
- Classifying software-based cache coherence solutionsIEEE Software, 1997
- Hardware approaches to cache coherence in shared-memory multiprocessors, Part 1IEEE Micro, 1994
- SPLASHACM SIGARCH Computer Architecture News, 1992
- A survey of cache coherence schemes for multiprocessorsComputer, 1990