Synthesis of application-specific memory designs
- 1 March 1997
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Vol. 5 (1) , 101-111
- https://doi.org/10.1109/92.555990
Abstract
This paper discusses the mapping of arrays in a behavior to memories in an implementation. We introduce a novel approach to the design of memory systems, which is based on a variety of array grouping techniques and dimensional transformations, and the binding of array groups to memory components with different dimensions, access times, and number of ports. The results of design actions are computed in terms of memory cost, the number of wires necessary to connect the memory to the data path, and the limit of performance imposed by the memory design on the implementation. Three different procedures can be used to find a suitable memory design. All three procedures are directed by a weighted and constrained system cost function, which enables the expression of the user's design priorities. Compared to related research efforts, our approach improves performance by as much as 19%, reduces memory cost as 40%, and decreases the number of wires required to connect the memory to the data path by up to 57%.Keywords
This publication has 17 references indexed in Scilit:
- Dataflow-driven Memory Allocation For Multi-dimensional Signal Processing SystemsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- The combination of scheduling, allocation, and mapping in a single algorithmPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Address generation for memories containing multiple arraysPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Background memory area estimation for multidimensional signal processing systemsIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1995
- High-Level Synthesis for Real-Time Digital Signal ProcessingPublished by Springer Nature ,1993
- In-place memory management of algebraic algorithms on application specific ICsJournal of Signal Processing Systems, 1991
- An area model for on-chip memories and its applicationIEEE Journal of Solid-State Circuits, 1991
- Architecture-driven synthesis techniques for VLSI implementation of DSP algorithmsProceedings of the IEEE, 1990
- Algorithmic and Register-Transfer Level Synthesis: The System Architect’s WorkbenchPublished by Springer Nature ,1990
- The MIMOLA Design System: Detailed Description of the Software SystemPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979