Integrated Conditioned OR and Inhibited OR Logic Circuits

Abstract
High-speed logic circuits capable of subnanosecond operation are described. The circuits may be constructed using monolithic transistor circuits and attached tunnel diodes, or entirely in hybrid integrated form. A capacitance isolation technique allowing the use of conventional monolithic current mode logic (CML) circuits in conjuction with tunnel diodes is also presented. This results in considerably increased speed and logic flexibility. With this approach, the potential low cost of monolithic circuits of large production volume and the high-speed capability of the tunnel diodes are both retained. Using commercially available tunnel diodes and monolithic circuits, average propagation delays of under 0.4 ns were achieved in an operating system. This represents about an order of magnitude improvement over speeds obtainable with monolithic circuits alone for an important class of logic functions. Good noise immunity is obtained since the tunnel diodes perform only the analog threshold OR operation. The described CONDITIONED OR and INHIBITED OR circuit family is logically complete; however, it is particularly suited for iterative logic. The circuit operation and characteristics are discussed in detail. Examples of their use are also given.

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