VLSI design of on-line add/multiply algorithms
- 1 January 1993
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 264-267
- https://doi.org/10.1109/iccd.1993.393369
Abstract
ISBN: 0818642300We present some VLSI structures suitable for online arithmetic embedded algorithms using a radix-two fixed point signed digit system. As an application, we present online add/multiply architectures allowing the obtention of a zero-delay operator. An example of a circuit for online computation of several real functions using polynomials is also discussedKeywords
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