A 40-GHz Flip-Flop-Based Frequency Divider
- 19 December 2006
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
- Vol. 53 (12) , 1358-1362
- https://doi.org/10.1109/tcsii.2006.885393
Abstract
This brief presents the design and implementation of a 40-GHz flip-flop-based frequency divider which incorporates a novel latch topology with two distinct tail current sources and an enabled cross-coupled pair during the tracking mode. The proposed topology will speed up the latch operation and increase the driving capability. It is capable of performing frequency division at 40 GHz without shunt or series peaking inductors. The circuit was fabricated in a 0.18-mum SiGe BiCMOS process, where only CMOS transistors were used. It draws an average current of 5 mA from a 1.8-V supply voltageKeywords
This publication has 11 references indexed in Scilit:
- A novel 40-GHhz flip-flop-based frequency divider in 0.18μm CMOSPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- A 15-GHz broad-band /spl divide/2 frequency divider in 0.13-/spl mu/m CMOS for quadrature generationIEEE Microwave and Wireless Components Letters, 2005
- A 40 GHz 2.1 V static frequency divider in SiGe using a low-voltage latch topologyPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- Design of ultrahigh-speed low-voltage CMOS CML buffers and latchesIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2004
- A 40-GHz Frequency Divider in 0.18-$muhboxm$CMOS TechnologyIEEE Journal of Solid-State Circuits, 2004
- New structures for very high-frequency CMOS clock dividersPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A 79 GHz dynamic frequency divider in SiGe bipolar technologyPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Superharmonic injection-locked frequency dividersIEEE Journal of Solid-State Circuits, 1999
- A novel high-speed latching operation flip-flop (HLO-FF) circuit and its application to a 19-Gb/s decision circuit using a 0.2-μm GaAs MESFETIEEE Journal of Solid-State Circuits, 1995
- Fractional-Frequency Generators Utilizing Regenerative ModulationProceedings of the IRE, 1939