Effect of arsenic segregation on the electrical properties of grain boundaries in polycrystalline silicon

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Abstract
Equilibrium arsenic segregation to the grain boundaries of polycrystalline silicon was measured directly by x-ray microanalysis in the temperature range 700–1000 °C. A direct link was observed between arsenic segregation and resistivity. Increasing arsenic segregation at the lower annealing temperatures is consistent with an observed increase in resistivity. Fitting the enhancement levels at various temperatures with the McLean segregation isotherm, a binding energy of 0.65 eV/atom and a boundary saturation limit of 12 at. % for arsenic was obtained. A model for the effect of the segregation of arsenic to silicon grain boundaries is proposed. Segregation to boundary defects that cause trapping states can remove these interfacial traps, and segregation to other boundary sites can create a degenerately-doped interfacial layer. The electrical consequences of this segregation are considered, and by comparison of the measured resistivity changes with temperatures with those predicted from these simple models it is proposed that the major contribution to the resistivity in heavily-doped polycrystalline silicon comes from scattering of carriers by the high density of positive charge at the grain boundaries.