A new method for realizing JFETs and super B's in a standard bipolar IC process
- 1 February 1982
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 17 (1) , 81-83
- https://doi.org/10.1109/JSSC.1982.1051691
Abstract
A new method for the realization of p-channel JFETs is presented. It is based on the removal of thin silicon layers by repeated anodic oxidation and etching, allowing the shallow-n (SN) diffusion to penetrate deeper into the shallow-p (SP) region. JFETs with a thin channel are thus obtained with a high yield and good reproducibility.Keywords
This publication has 2 references indexed in Scilit:
- JFET's fabricated in a standard IC process for bipolar transistorsIEEE Journal of Solid-State Circuits, 1978
- Repeated Removal of Thin Layers of Silicon by Anodic OxidationJournal of the Electrochemical Society, 1976