A Method for the Realization of Fail-Safe Asynchronous Sequential Circuits
- 1 July 1974
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-23 (7) , 736-739
- https://doi.org/10.1109/t-c.1974.224022
Abstract
The problem of the realization of fail-safe asynchronous sequential circuits was recently studied by Patterson and Sawin. This correspondence presents a different approach to the same subject which, in some cases, yield us simpler realization than those by the methods ever proposed, combining the notion of the ordered partition with Tracey's method for the state assignment of asynchronous sequential circuit.Keywords
This publication has 5 references indexed in Scilit:
- A Fail-Safe Asynchronous Sequential MachineIEEE Transactions on Computers, 1974
- Asynchronous Sequential Machines Designed for Fault DetectionIEEE Transactions on Computers, 1974
- Realization of Fail-Safe Sequential Machines by Using a k-out-of-n CodeIEEE Transactions on Computers, 1971
- State Assignments for Asynchronous Sequential MachinesIEEE Transactions on Computers, 1971
- Internal State Assignments for Asynchronous Sequential MachinesIEEE Transactions on Electronic Computers, 1966