Design of Totally Fault Locatable Combinational Networks
- 1 January 1980
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-29 (1) , 33-44
- https://doi.org/10.1109/tc.1980.1675454
Abstract
The design of combinational logic networks is considered in which equivalent or indistinguishable stuck-type faults are confined to a small region of the network. A general type of fault equivalence called S-equivalence is introduced, which defines fault equivalence with respect to an arbitrary set of modules S. A network N is called totally fault locatable with respect to module set S, denoted TFLS, if all specified faults in N are S-equivalent. Some general structural properties of TFLS networks are derived. The problem of designing TFLS networks is investigated for S = {AND, OR, NAND, NOR, NOT} denoted AON, and S = {AON, EXCLUSIVE- OR} denoted AONE. All equivalent fault classes in TFLAON and TFLAONE networks can be identified by inspection. It is shown that every function has a TFLAONE network, that is, a realization where all equivalence classes can be identified by inspection, containing at most one control point or extra input. A method for constructing a TFLAONE realization of an arbitrary function is presented using at most one control point.Keywords
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