An integrated m-out-of-n detection circuit using threshold logic
- 1 October 1974
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 9 (5) , 297-306
- https://doi.org/10.1109/JSSC.1974.1050517
Abstract
The design of the integrated 4-out-of-9 detector is based on a threshold logic approach. A differential current-switching circuit configuration is used, and the detector is fully compatible with conventional emitter-coupled logic (ECL). The circuit has a propagation delay of 16 ns and dissipates only 100 mW. The functional power-delay product of 1600 pJ is an order of magnitude below that achieved with an efficient gate design.Keywords
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