Minimizing floating-body-induced threshold voltage variation in partially depleted SOI CMOS
- 1 August 1996
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 17 (8) , 391-394
- https://doi.org/10.1109/55.511585
Abstract
Pulse propagation problems associated with dynamic floating-body effects, e.g., pulse stretching, is measured in partially depleted SOI CMOS inverter chains. Pulse stretching is found to be dependent on pulse frequency and V/sub DD/. Such behavior is attributed to floating-body-induced transient threshold voltage variation in partially depleted SOI CMOS devices due to floating-body charge imbalance between logic states during CMOS switching. Such an imbalance can be minimized through proper device design because of the different dependencies of the gate and drain depletion charges on channel length, silicon film thickness, gate oxide thickness, channel doping, and supply voltage. This is confirmed by measuring the maximum transient threshold voltage variation in discrete partially depleted SOI NMOS devices in configurations which are predictive of CMOS switching behavior.Keywords
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