A 0.8-dB NF ESD-Protected 9-mW CMOS LNA operating at 1.23 GHz [for GPS receiver]
- 7 August 2002
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 37 (6) , 760-765
- https://doi.org/10.1109/jssc.2002.1004580
Abstract
In recent years, much research has been carried out on the possibility of using pure CMOS, rather than bipolar or BiCMOS technologies, for radio-frequency (RF) applications. An example of such an application is the Global Positioning System (GPS). One of the important bottlenecks to make the transition to pure CMOS is the immunity of the circuits against electrostatic discharge (ESD). This paper shows that it is possible to design a low-noise amplifier (LNA) with very good RF performance and sufficient ESD immunity by carefully co-designing both the LNA and ESD protection. This is demonstrated with a 0.8-dB noise figure LNA with an ESD protection of -1.4-0.6 kV human body model (HBM) with a power consumption of 9 mW. The circuit was designed as a standalone LNA for a 1.2276-GHz GPS receiver. It is implemented in a standard 0.25-/spl mu/m 4M1P CMOS process.Keywords
This publication has 4 references indexed in Scilit:
- MOS noise performance under impedance matchingconstraintsElectronics Letters, 1999
- On-chip spiral inductors with patterned ground shields for Si-based RF ICsIEEE Journal of Solid-State Circuits, 1998
- A 1.5-V, 1.5-GHz CMOS low noise amplifierIEEE Journal of Solid-State Circuits, 1997
- A 1 GHz CMOS RF front-end IC for a direct-conversion wireless receiverIEEE Journal of Solid-State Circuits, 1996