Highly parallel residue arithmetic chip based on multiple-valued bidirectional current-mode logic
- 1 October 1989
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 24 (5) , 1404-1411
- https://doi.org/10.1109/jssc.1989.572624
Abstract
No abstract availableKeywords
This publication has 6 references indexed in Scilit:
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- Comparison of binary and multivalued ICs according to VLSI criteriaComputer, 1988
- A 32*32-bit multiplier using multiple-valued MOS current-mode circuitsIEEE Journal of Solid-State Circuits, 1988
- Design of highly parallel residue arithmetic circuits based on multiple-valued bidirectional current-mode MOS technologyPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1988
- VLSI implementation in multiple-valued logic of an FIR digital filter using residue number system arithmeticIEEE Transactions on Circuits and Systems, 1986
- Residue Number Scaling and Other Operations Using ROM ArraysIEEE Transactions on Computers, 1978