1/ f noise reduction of metal-oxide-semiconductor transistors by cycling from inversion to accumulation
- 15 April 1991
- journal article
- research article
- Published by AIP Publishing in Applied Physics Letters
- Vol. 58 (15) , 1664-1666
- https://doi.org/10.1063/1.105130
Abstract
A new experimental setup for the study of 1/ f noise of metal‐oxide‐semiconductor transistor under nonsteady state conditions is presented. The noise measurements demonstrate for the first time that, by interposing periods of negative bias corresponding to accumulation between the monitored periods of positive bias corresponding to inversion, the low‐frequency noise sampled in the positive bias intervals is reduced.Keywords
This publication has 9 references indexed in Scilit:
- Evidence that similar point defects cause 1/fnoise and radiation-induced-hole trapping in metal-oxide-semiconductor transistorsPhysical Review Letters, 1990
- The development and application of a SiSiO2 interface-trap measurement system based on the staircase charge-pumping techniqueSolid-State Electronics, 1989
- noise and other slow, nonexponential kinetics in condensed matterReviews of Modern Physics, 1988
- Discrete Resistance Switching in Submicrometer Silicon Inversion Layers: Individual Interface Traps and Low-Frequency (?) NoisePhysical Review Letters, 1984
- 1/f noiseProceedings of the IEEE, 1982
- Low-frequency fluctuations in solids:noiseReviews of Modern Physics, 1981
- Energy Scales for Noise Processes in MetalsPhysical Review Letters, 1979
- Theory and experiments on surface 1/f noiseIEEE Transactions on Electron Devices, 1972
- Low frequency noise in MOS transistors—I TheorySolid-State Electronics, 1968