High performance 0.1- mu m room temperature Si MOSFETs

This publication has 2 references indexed in Scilit:

• Scaling the Si metal-oxide-semiconductor field-effect transistor into the 0.1-μm regime using vertical doping engineering
  Applied Physics Letters, 1991
• Design and experimental technology for 0.1-µm gate-length low-temperature operation FET's
  IEEE Electron Device Letters, 1987