Asynchronous design for programmable digital signal processors

This publication has 22 references indexed in Scilit:

• Translating concurrent programs into delay-insensitive circuits
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• Compilations of communicating processes into delay-insensitive circuits
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• The design of an asynchronous MIPS R3000 microprocessor
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Design and evaluation of an architecture for a digital signal processor for instrumentation applications
  IEEE Transactions on Acoustics, Speech, and Signal Processing, 1990
• Compiling communicating processes into delay-insensitive VLSI circuits
  Distributed Computing, 1986
• Random logic design utilizing single-ended cascode voltage switch circuits in NMOS
  IEEE Journal of Solid-State Circuits, 1985
• Cascode voltage switch logic: A differential CMOS logic family
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1984
• Communicating sequential processes
  Communications of the ACM, 1978
• Guarded commands, nondeterminacy and formal derivation of programs
  Communications of the ACM, 1975
• Petri nets and speed independent design
  Communications of the ACM, 1973