A subnanosecond masterslice array offering logic plus memory

1 January 1979

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

Vol. XXII, 64-65
https://doi.org/10.1109/isscc.1979.1155934

Abstract

A 35mm²bipolar masterslice array offering up to 712 gate functions of subnanosecond random logic and 128 bits of RAM will be reported, citing its application to a 50MHz 4b microprocessor slice.

Keywords

LOGIC ARRAYS
RANDOM ACCESS MEMORY
READ-WRITE MEMORY
CIRCUITS
LOGIC FUNCTIONS
DELAY
POWER DISSIPATION
WIRING
PROGRAMMABLE LOGIC ARRAYS
BORON

This publication has 1 reference indexed in Scilit:

A masterslice LSI for subnanosecond random logic
Published by Institute of Electrical and Electronics Engineers (IEEE) ,1977