Optimum voltage swing on on-chip and off-chip interconnect
- 1 July 2001
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 36 (7) , 1108-1112
- https://doi.org/10.1109/4.933468
Abstract
Reduced voltage swings are often used for saving power on interconnects. In this paper, we demonstrate the existence of an optimum voltage swing for minimum power consumption, for on-chip and off-chip interconnects. Actual values of optimum swings and corresponding power savings for high performance interconnects are estimated.Keywords
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