Yield optimization in wafer scale circuits with hierarchical redundancies
- 31 March 1986
- journal article
- other
- Published by Elsevier in Integration
- Vol. 4 (1) , 43-51
- https://doi.org/10.1016/0167-9260(86)90036-2
Abstract
No abstract availableKeywords
This publication has 1 reference indexed in Scilit:
- Redundancy for LSI Yield EnhancementIEEE Journal of Solid-State Circuits, 1967