A BIST scheme using microprogram ROM for large capacity memories

Publisher Website

4 December 2002

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

https://doi.org/10.1109/test.1990.114099

Abstract

No abstract available

Keywords

This publication has 3 references indexed in Scilit:

A 60-ns 4-Mbit CMOS DRAM with built-in selftest function
IEEE Journal of Solid-State Circuits, 1987
Built-In Self-Testing RAM: A Practical Alternative
IEEE Design & Test of Computers, 1987
Built-In Testing of Memory Using an On-Chip Compact Testing Scheme
IEEE Transactions on Computers, 1986