A static RAM chip with on-chip error correction
- 1 January 1990
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 25 (5) , 1290-1294
- https://doi.org/10.1109/4.62154
Abstract
No abstract availableKeywords
This publication has 5 references indexed in Scilit:
- Linear sum codes for random access memoriesIEEE Transactions on Computers, 1988
- Error-Correcting Codes for Semiconductor Memory Applications: A State-of-the-Art ReviewIBM Journal of Research and Development, 1984
- Circuit techniques for a VLSI memoryIEEE Journal of Solid-State Circuits, 1983
- Error-correction technique for random-access memoriesIEEE Journal of Solid-State Circuits, 1982
- 2K x 8 Bit Hi-CMOS Static RAM'sIEEE Journal of Solid-State Circuits, 1980