Improved logic synthesis algorithms for table look up architectures

This publication has 9 references indexed in Scilit:

• Improved logic synthesis algorithms for table look up architectures
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Logic synthesis for programmable gate arrays
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Chortle: a technology mapping program for lookup table-based field programmable gate arrays
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Chortle-crf: Fast technology mapping for lookup table-based FPGAs
  Published by Association for Computing Machinery (ACM) ,1991
• Xmap
  Published by Association for Computing Machinery (ACM) ,1991
• Technology mapping for a two-output RAM-based field programmable gate array
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1991
• Multi-level logic simplification using don't cares and filters
  Published by Association for Computing Machinery (ACM) ,1989
• MIS: A Multiple-Level Logic Optimization System
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
• Minimization Over Boolean Graphs
  IBM Journal of Research and Development, 1962