A 33ns 64Mb DRAM
- 1 January 1991
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- A 45 ns 16 Mb DRAM with triple-well structurePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Process integration for 64 M DRAM using an asymmetrical stacked trench capacitor (AST) cellPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A Twisted Bit Line Technique for Multi-Mb DramsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1988