A CMOS model for computer-aided circuit analysis and design

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Abstract
An equivalent circuit model to simulate the current-voltage behavior of CMOS transistors is discussed. This model can simulate the full range of complementary MOSFET operation and can handle latchup at the circuit analysis level. Using effective injection efficiencies a switching criterion and a method of solution for a four parasitic bipolar transistor system have been developed and incorporated. The configuration of the CMOS device is computed from data submitted by the user. This includes well depth, MOSFET separation, doping levels, minority-carrier lifetime, substrate bypass resistors, the option to float either or both substrates, and bias conditions. The model can be used alone or incorporated into existing computer-aided-design programs for analysis of circuits which contain CMOS components.

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