Asynchronous sequential circuits with (2, 1) type state assignments
- 1 October 1970
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
The simultaneous use of delayed and undelayed versions of the internal variables permits the realization of normal fundamental mode circuits with less restricted state assignments than the usual single transition time state assignments. This paper is concerned with problems associated with these state assignments.Keywords
This publication has 5 references indexed in Scilit:
- Realization Methods for Asynchronous Sequential CircuitsIEEE Transactions on Computers, 1971
- Universal Single Transition Time Asynchronous State AssignmentsIEEE Transactions on Computers, 1969
- Structural simplification and decomposition of asynchronous sequential circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1968
- A row assignment for delay-free realizations of flow tables without essential hazards7th Annual Symposium on Switching and Automata Theory (swat 1966), 1966
- Internal State Assignments for Asynchronous Sequential MachinesIEEE Transactions on Electronic Computers, 1966