Defining and Implementing a Multilevel Design Representation with Simulation Applications
- 1 July 1983
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 2 (3) , 135-145
- https://doi.org/10.1109/tcad.1983.1270031
Abstract
This paper describes the definition and implementation of a multilevel representation which includes both behavioral and structural information. Information for the representation is generated by the CMU-DA synthesis system. A timing abstraction aid which extracts logic level timing information from a detailed implementation and makes it available for the ISPS behavioral simulator is discussed. Such a multilevel representation and design aid allows the system level designers to be in a closed loop of design aids with the technology level designers.Keywords
This publication has 9 references indexed in Scilit:
- A design methodology and computer aids for digital VLSI systemsIEEE Transactions on Circuits and Systems, 1981
- The Modeling and Synthesis of Bus SystemsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1981
- Instruction set processor specifications (ISPS): The notation and its applicationsIEEE Transactions on Computers, 1981
- The automatic synthesis of digital systemsProceedings of the IEEE, 1981
- The SLIDE simulatorPublished by Association for Computing Machinery (ACM) ,1980
- Techniques for the simulation of large-scale integrated circuitsIEEE Transactions on Circuits and Systems, 1979
- The Application of Program Verification to Hardware VerificationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979
- Register-Transfer Level Digital Design Automation: The Allocation ProcessPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1978
- Overview of the military computer family architecture selectionPublished by Association for Computing Machinery (ACM) ,1977