A 4-Mbit NAND-EEPROM with tight programmed Vt distribution

Publisher Website

1 January 1990

proceedings article
Published by Institute of Electrical and Electronics Engineers (IEEE)

https://doi.org/10.1109/vlsic.1990.111117

Abstract

No abstract available

Keywords

This publication has 2 references indexed in Scilit:

An experimental 4-Mbit CMOS EEPROM with a NAND-structured cell
IEEE Journal of Solid-State Circuits, 1989
A 90-ns one-million erase/program cycle 1-Mbit flash memory
IEEE Journal of Solid-State Circuits, 1989