Flip chip attach with thermoplastic electrically conductive adhesive

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Abstract
A set of processes has been developed and demonstrated to interconnect flip chips with an electrically conductive adhesive material to laminates. Paste deposition uses a photolithography process to define room temperature stable thermoplastic conductive adhesive bumps that are 0.2 mm in diameter and 0.1 mm high. Photobumping is done at wafer level, and dicing yields chips that are ready for attachment to a carrier. Chip bonding process development defined a process window and identified an optimal process point. Repeatable tensile bond strengths between 10 and 14 MPa can be achieved. Fracture mode typically occurs near an interface but in the joint material. Bonding temperature, pressure, and pressure on cool-down (to 120/spl deg/C) were identified as key process variables. The optimum bonding process point is applying one MPa to the chip, while heating to 235/spl deg/C. Pressure is maintained for 30 seconds at temperature and until cooled to 70/spl deg/C. These optimum bond parameters resulted in bond lines of 0.05/spl plusmn/0.005 mm. The harshest stress test is deep thermal cycling for both blanket and stitched chip designs. The interconnect performance on the blanket chip is comparable to soldered flip chip on laminate. The interconnect performance on the stitch chip is less robust. It is believed that reaction between the photobumping stripper and the polyimide passivation results in a weak interface between the adhesive bump and card metallurgy. Results from stress testing demonstrate the design feasibility of electrically conductive adhesive interconnects for flip chip attach to laminates.

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