Compiler support for scalable and efficient memory systems
- 1 November 2001
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. 50 (11) , 1234-1247
- https://doi.org/10.1109/12.966497
Abstract
Technological trends require that future scalable microprocessors be decentralized. Applying these trends toward memory systems shows that the size of the cache accessible in a single cycle will decrease in a future generation of chips. Thus, a bank-exposed memory system comprised of small, decentralized cache banks must eventually replace that of a monolithic cache. This paper considers how to effectively use such a memory system for sequential programs. This paper presents Maps, the software technology central to bank-exposed architectures, which are architectures with bank-exposed memory systems. Maps solves the problem of bank disambiguation-that of determining at compile-time which bank a memory reference is accessing. Bank disambiguation is important because it enables the compile-time optimization for data locality, where data can be placed close to the computation that requires it. Two methods for bank disambiguation are presented: equivalence-class unification and modulo unrolling. Experimental results are presented using a compiler for the MIT Raw machine, a bank-exposed architecture that relies on the compiler to 1) manage its memory and 2) orchestrate its instruction level parallelism and communication. Results on Raw using sequential codes demonstrate that using bank disambiguation improves performance, by a factor of 3 to 5 over using ILP alone.Keywords
This publication has 18 references indexed in Scilit:
- Memory bank and register allocation in software synthesis for ASIPsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Rethinking deep-submicron circuit designComputer, 1999
- Space-time scheduling of instruction-level parallelism on a raw machinePublished by Association for Computing Machinery (ACM) ,1998
- Baring it all to software: Raw machinesComputer, 1997
- Maximizing multiprocessor performance with the SUIF compilerComputer, 1996
- Dynamic memory disambiguation using the memory conflict bufferPublished by Association for Computing Machinery (ACM) ,1994
- Communication Optimizations for Irregular Scientific Computations on Distributed Memory ArchitecturesJournal of Parallel and Distributed Computing, 1994
- The multiflow trace scheduling compilerThe Journal of Supercomputing, 1993
- Automatic translation of FORTRAN programs to vector formACM Transactions on Programming Languages and Systems, 1987
- Very Long Instruction Word architectures and the ELI-512Published by Association for Computing Machinery (ACM) ,1983