Numerical optimization-based synthesis of pipelined A/D converters
- 2 January 2003
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 5, 2152-2155
- https://doi.org/10.1109/iscas.1992.230566
Abstract
No abstract availableKeywords
This publication has 7 references indexed in Scilit:
- Automating analog circuit design using constrained optimization techniquesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- CADICS-cyclic analog-to-digital converter synthesisPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A 13-b 2.5-MHz self-calibrated pipelined A/D converter in 3- mu m CMOSIEEE Journal of Solid-State Circuits, 1991
- A current-based positive-feedback technique for efficient cascode bootstrappingPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1991
- Asymptotic waveform evaluation for timing analysisIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1990
- OASYS: a framework for analog circuit synthesisIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1989
- BSIM: Berkeley short-channel IGFET model for MOS transistorsIEEE Journal of Solid-State Circuits, 1987