A 100 MHz output rate analog-to-digital interface for PRML magnetic-disk read channels in 1.2 μm CMOS
- 17 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
A key element in the signal path of magnetic-disk read channels employing digital implementations of PRML and other discrete-time signalling approaches is the analog-to-digital (A/D) interface containing a pre-filter, sampler, and analog-to-digital converter (ADC). The pre-filter performs noise filtering, anti-aliasing, and pre-equalization prior to sampling and conversion to the digital domain. At symbol rates of 100 MHz and above, envisioned in the future, implementation of the required filtering is difficult using conventional approaches. This paper describes a filter/ADC combination that uses a switched-capacitor FIR passive sampling approach.Keywords
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